| Title | Main author | Title of the periodical or the series | Year of publication | Relevant pages |
A Deterministic Boltzmann Equation Solver Based on a Higher Order Spherical Harmonics Expansion With Full-Band Effects | S.-M. Hong, G. Matz, and C. Jungemann, | Transaction on Electron Devices, | October 2010 | Vol.57, n.10,p. 2390-2397 |
Improving the high-frequency performance of SiGe HBTs by a global additional uniaxial stress | 1.T. V. Dinh, S.-M. Hong, C. Jungemann | Solid-State Electronics | June 2011 | Vol.60, Issue 1,p.58-64, |
Modeling of NPN-SiGe-HBT Electrical Performance Improvement through | M. Al-Sa’di, S. Fregonese, C. Maneux, and T. Zimmer | ECS Transactions, 33 (6) | 2010 | p.191-199, |
Half-Terahertz Silicon/Germanium Heterojunction Bipolar Technologies | A. Sibaja-Hernandez, S. You, S. Van Huylenbroeck, R. Venegas, K. De Meyer1, and S. Decoutere | Solid-Sate Electronics | 2011 | |
Recombination in the Ge-spiked monoemitter of the SiGe | S. You, S. Decoutere, A. Sibaja-Hernandez, R. Venegas, S. Van Huylenbroeck, and K. De Meyer | HBTs, Solid State Electronics | 2011 | Vol.61, No. 1,p. 81-86, |
Avalanche multiplication and pinch-in models for simulating electrical instability effects in SiGe HBTs | G. Sasso, M. Costagliola and N. Rinaldi | Microelectronics Reliability | | Vol.50, Issues 9-1,p. 1577-1580 |
TCAD Modeling of NPN-Si-BJT Electrical Performance Improvement Through SiGe Extrinsic Stress Layer | M.Al-Sa’di, S.Fregonese, C.Maneux, T. Zimmer | Journal of Materials Science in Semiconductor Processing | | |
Physical and electrical performance limits of high-speed SiGeC HBTs – Part I: Vertical scaling | M. Schroter, G. Wedel, B. Heinemann, C. Jungemann, J. Krause, P. Chevalier, A. Chantre | IEEE Transactions of Electron Devices | | |
Physical and electrical performance limits of high-speed SiGeC HBTs – Part II: Lateral scaling | M. Schroter, J. Krause, N. Rinaldi, G. Wedel, B. Heinemann, P. Chevalier, A. Chantre | IEEE Transactions of Electron Devices | | |
Advanced Process Modules and Architectures for Half-Terahertz SiGe:C HBTs | S. Decoutere | BCTM | 2009 | p.9-16 |
Pushing the Speed Limits of SiGe:C HBTs up to 0.5 THz | S. Decoutere | CICC | 2009 | p.347-354 |
A 400 GHz fmax fully self-aligned SiGe:C HBT architecture | S. Van Huylenbroeck | BCTM | 2009 | p.5-8 |
TCAD based Device Architecture exploration towards Half-Terahertz Silicon/germanium heterojunction bipolar technology | A. Sibaja-Hernandez | ESSDERC | 2010 | p.246-249 |
Recombination in the Ge-spiked monoemitter of the SiGe:C HBTs | S. You | Solid-State Electronics | 2011 | p.81-86 |
Arsenic-doped Ge-spiked monoemitter SiGe:CHBTs by means of low-temperature trisilane based epitaxy | S. You | ICSI-7 | 2011 | |
Impact of Isolation Scheme on Thermal Resistance and Collector-substrate Capacitance of SIGe HBTs | S. You | ESSDERC | 2011 | p.243-246 |
Pedestal Collector Optimization for High Speed SiGe:C HBT | S. Van Huylenbroeck | BCTM | 2011 | |
A Deterministic Boltzmann Equation Solver Based on a Higher Order Spherical Harmonics Expansion With Full-Band Effects | S.-M. Hong, G. Matz, and C. Jungemann, | Transaction on Electron Devices, | October 2010 | p.2390-2397,vol. 57,n.10, |
Modeling of NPN-SiGe-HBT Electrical Performance Improvement through | M. Al-Sa’di, S. Fregonese, C. Maneux, and T. Zimmer | ECS Transactions, 33 (6) | 2010 | p.191-199, |
Recombination in the Ge-spiked monoemitter of the SiGe | S. You, S. Decoutere, A. Sibaja-Hernandez, R. Venegas, S. Van Huylenbroeck, and K. De Meyer | HBTs, Solid State Electronics | 2011 | Vol.61, No.1,p. 81-86, |
Avalanche multiplication and pinch-in models for simulating electrical instability effects in SiGe HBTs | G. Sasso, M. Costagliola and N. Rinaldi | Microelectronics Reliability | | Vol.50,Issues 9-11,p. 1577-1580 |
TCAD Modeling of NPN-Si-BJT Electrical Performance Improvement Through SiGe Extrinsic Stress Layer | M.Al-Sa’di, S.Fregonese, C.Maneux, T. Zimmer | Journal of Materials Science in Semiconductor Processing | | Vol.53, Issue 9, p.2321-2326 |
Physical and electrical performance limits of high-speed SiGeC HBTs – Part II: Lateral scaling | M. Schroter, J. Krause, N. Rinaldi, G. Wedel, B. Heinemann, P. Chevalier, A. Chantre | IEEE Transactions of Electron Devices | | Vol.58, Issue 11,p. 3697-3706 |
Deterministic solvers for the Boltzmann transport equation | S.M. Hong, A.T. Pham, C. Jungemann | Computational Microelectronics | 2011 | 1st Edition 2011, XVIII, 227 p.125 |
fmax increase to 500 GHz of SiGe HBTs at low temperature | N. Zerounian, M. Diallo, F. Aniel, P. Chevalier, A. Chantre | ECS Transactions | 2010 | Vol. 33, No.6,p.311-318 |
Highly integrated 79, 94, and 120-GHz SiGe Radar Frontends | M. Jahn, A. Stelzer, A. Hamidipour | MTT-S Int. Microwave Symp. Dig. 2010 | May 2010 | p.1324-1327 |
Highly-Integrated Multi-Channel Radar Sensors in SiGe Technology for Automotive Frequencies and Beyond | A. Stelzer, R. Feger, M. Jahn | ICECom 2010 Conference Proc. | Sept. 2010 | p.1-11 |
On-wafer Passives De-Embedding Based on Open-Pad and Transmission Line Measurement | A. Hamidipour, M. Jahn, F. Starzer, X. Wang, A. Stelzer | IEEE Bipolar/BiCMOS Circuits and Technology Meeting 2010 | Oct. 2010 | p.102-105 |
DC-Offset Compensation Concept for Monostatic FMCW Radar Transceivers | M. Jahn, C. Wagner, A. Stelzer | IEEE Microwave and Wireless Components Letters | Sept. 2010 | Vol.20, No.9,p. 525-527 |
A 122-GHz SiGe-Based Signal-Generation Chip Employing a Fundamental-Wave Oscillator With Capacitive Feedback Frequency-Enhancement | M. Jahn, H. Knapp, A. Stelzer | IEEE Journal of Solid-State Circuits | Sept. 2011 | Vol.46, No.9,p. 2009-2020 |
A 120-GHz FMCW Radar Frontend Demonstrator Based on a SiGe Chipset | M. Jahn, A. Hamidipour, Z.Tong, and A. Stelzer | European Microwave Conference 2011 | Oct. 2011 | |
A Four-Channel 94-GHz SiGe-Based Digital Beamforming FMCW Radar | M.Jahn, R. Feger, C. Wagner, Z.Tong, A. Stelzer | Transactions MTT (Special Issue on mm-Wave Circuits and Systems) | 2012 | to be published |
Advanced process modules and architectures | S. Decoutere, S. Van Huylenbroeck, B. Heinemann, A. Fox, P. Chevalier, A. Chantre, T. F. Meister, K. Aufinger and M. Schroter, terahertz SiGeC HBTs“, | Proceedings BCTM, | | p.9-16, 2009. Invited |
Pushing the speed limits of SiGeC HBTs up to 0.5 THz | S. Decoutere, S. Van Huylenbroeck, B. Heinemann, A. Fox, P. Chevalier, A. Chantre, T. F. Meister, K. Aufinger and M. Schroter | Proceedings CICC | | p.347-354, 2009. Invited |
A 400 GHz fmax fully self-aligned SiGeC HBT architecture | S. Van Huylenbroeck, A. Sibaja-Hernandez, R. Venegas, S. You, G. Winderickx, D. Radisic, W. Lee, P. Ong | Proceedings BCTM | | p.5-8, 2009 |
Millisecond annealing of high-performance SiGe HBTS | D. Bolze, B. Heinemann, J. Gelpy, F. McCoy, W. Lerch | 17th IEEE RTP | | pp.1-11, 2009 |
SiGe HBT module with 2.5 ps gate delay | A. Fox et al | IEDM | | p.731-734,2008 |
Advanced Architectures for High Performance SiGe HBTs | A. Fox et al | ISTDM, | | ISTDM, 2010 |
Solid-phase epitaxy of amorphous silicon by in-situ post-annealing using RPCVD | O. Skibitzki et al | ISTDM, | | ISTDM, 2010 |
SiGe HBT Technology with fT/fmax of 300GHz/500GHz and 2.0 ps CML Gate Delay | Heinemann et al | IEDM | 2010 | p.688-691,2010 |
Double-polysilicon SiGe HBT architecture with lateral base link, | | Solid State Electronics 60 | | pp.93-99, 2011 |
Impact of isolation scheme on thermal resistance and collector-substrate capacitance of SiGe HBTs | S. You et al | ESSDERC | September 2011 |
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Pedestal Collector Optimization for High Speed SiGe:C HBT | S. Van Huylenbroeck et a | BCTM | October 2011 | |
SiGe:C HBT Architecture with Epitaxial External Base | A. Fox et al | BCTM | October 2011 | |
Impact of isolation scheme on thermal resistance and collector-substrate capacitance of SiGe HBTs | S. You et al | ESSDERC | September 2011 | |
Pedestal Collector Optimization for High Speed SiGe:C HBT | S. Van Huylenbroeck et a | BCTM | October 2011 | |
SiGe:C HBT Architecture with Epitaxial External Base | A. Fox et al | BCTM | October 2011 | |
The HiCUM Bipolar Transistor Model, book chapter contribution in “Compact Modeling, Principles, Techniques and Applications” | Michael Schroter and Bertrand Ardouin | book chapter | 2010 | |
Modeling and Parameter Extraction of SiGe:C HBT’s with HICUM for the Emerging Terahertz Era | B. Ardouin, C. Raya, M. Schroter, A. Pawlak, D. Céli, F. Pourchon, K. Aufinger, T. F. Meister, T. Zimmer | @ European Microwave conference | 2010 | |
Improving Parasitic Emitter resistance Determination Methods for Advanced SiGe:C HBT Transistor | C. Raya, B. Ardouin, Z. Huszka, | BCTM 2011 | 2011 | |
Active 220- and 325-GHz Frequency Multiplier Chains in an SiGe HBT Technology | Erik Öjefors, Bernd Heinemann, and Ullrich R. Pfeiffer | IEEE Transactions of Microwave Theory and Techniques | 2011 | p.1311-1318 |
A 160-GHz low-noise downconversion receiver front-end in a SiGe HBT technology | Erik Öjefors, Franck Pourchon, Pascal Chevalier, and Ullrich R. Pfeiffer | International Journal of Microwave and Wireless Technologies | 2011 | p.347-355 |
A 160-GHz Subharmonic Receiver in a SiGe HBT Technology | Erik Öjefors, Klaus Aufinger, Thomas Meister, and Ullrich R. Pfeiffer | IEEE Transactions of Microwave Theory and Techniques | 2010 | |
SiGe HBT module with 2.5 ps gate delay | A. Fox, B. Heinemann, et al. | IEDM | 2008 | p.731 - 734 |
SiGe HBT Technology with fT/fmax of 300GHz/500GHz and 2.0 ps CML Gate Delay | B. Heinemann et al. | IEDM | 2010 | p.688 - 691 |
Advanced Architectures for High Performance SiGe HBTs | A. Fox and B. Heinemann | ISTDM | May 2010 | Vol.96, Issue 9, p.1656-1668 |
Solid-phase epitaxy of amorphous silicon by in-situ postannealing using RPCVD | Oliver Skibitzki et al. | ISTDM | 2010 | |
Double-polysilicon SiGe HBT architecture with lateral base link | A. Fox, B. Heinemann and H. Rücker | Solid State Electronics | 2011 | Vol.60, Issue 1, p.93-99 |
SiGe:C HBT Architecture with Epitaxial External Base | A. Fox, B. Heinemann, et al. | BCTM | 2011 | |
Millisecond annealing of high-performance SiGe HBTs | D. Bolze, B. Heinemann, J. Gelpy, F. McCoy, W. Lerch | RTP 2009 | 2009 | p.1-11 |
Pushing Conventional SiGe HBT Technology Towards ‘Dotfive’ Terahertz | A. Chantre, P. Chevalier, T. Lacave, G. Avenier, M. Buczko, Y. Campidelli, L. Depoyan, L. Berthier, C. Gaquière | EuMiC 2010 | 2010 | p.21-24 |
A Conventional Double-Polysilicon FSA-SEG Si/SiGe:C HBT Reaching 400 GHz fMAX | P. Chevalier, F. Pourchon, T. Lacave, G. Avenier, Y. Campidelli, L. Depoyan, G. Troillard, M. Buczko, D. Gloria, D. Céli, C. Gaquière, A. Chantre | BCTM 2009 | 2009 | p.1-4 |
Towards THz SiGe HBTs | P. Chevalier, T.F. Meister, B. Heinemann, S. Van Huylenbroeck, W. Liebl, A. Fox, A. Sibaja-Hernandez and A. Chantre | BCTM 2011 | 2011 | |
Vertical Profile Optimization for +400 GHz fMAX Si/SiGe:C HBTs | T. Lacave, P. Chevalier, Y. Campidelli, M. Buczko, L. Depoyan, L. Berthier, G. Avenier, C. Gaquière, A. Chantre | BCTM 2010 | 2010 | p.49-52 |
Influence of the Selectively Implanted Collector Integration on +400 GHz fMAX Si/SiGe:C HBTs | T. Lacave et al | ECS-SiGe 2010 | 2010 | |
